1. Field of Invention
The present invention relates to organic transistors and, more particularly, to a laser ablation method of fabricating high performing organic FETs utilizing an efficient high volume patterning technique to define the channel length.
2. Description of Related Art
Organic MOS transistors are similar to silicon metal-oxide-semiconductor transistors in operation. The major difference in construction is that the organic MOS transistor utilizes a thin layer of a semiconducting organic polymer film to act as the semiconductor of the device, as opposed to a silicon layer as used in the more typical in-organic silicon MOS device.
Referring now to FIG. 1, a cross-sectional diagram of a bottom-gate bottom-contact organic MOS transistor 100 is shown. A metallic region 122 is deposited on an insulating substrate 112 forming the gate 122 of the organic MOS device 100. A thin dielectric region 120 is placed on top of gate region 122 to electrically isolate it from other layers and to act as the MOS gate insulator. Metallic conductors 118 and 116 are formed on the dielectric region 120 above the gate region 122 such that there is a gap 124 between conductors 116 and 118 overlapping gate metal 122. The gap 124 is known as the channel region of transistor 100. A thin film of organic semiconducting material 114 is deposited on dielectric region 120 and over at least a portion of metallic conductors 116 and 118. A voltage applied between the gate 122 and the source 118 modifies the resistance of the organic semiconductor film 114 in gap region 124 in the vicinity of the interface between semiconductor region 124 and dielectric 120. This is defined as the “field effect”. When another voltage is applied between the source 118 and the drain 116, a current flows between the drain and source with a value dependent on both the gate-to-source and the drain-to-source voltages.
An organic transistor 200 can also be constructed as a bottom-gate top-contact structure as shown in FIG. 2. Conductor layer 222 is deposited and patterned on substrate 212. A dielectric layer 220 is deposited on conductor layer 222. A thin film of semiconductor material 214 is deposited on top of dielectric layer 220. A conductive film is deposited and patterned on top of organic semiconductor 214 to form conductive source and drain regions 216 and 218, such that there is a gap 224 that overlaps the underlying gate metal layer 222. The gap 224 is known as the channel region of transistor 200. Through the field effect, a voltage is applied between gate conductor 222 and source 218 that modifies the resistance of the organic semiconductor 214 in the gap region 224 in the vicinity of the interface between the semiconductor region 214 and the dielectric 220. When another voltage is applied between source 218 and drain 216, a current flows between the drain and the source with a value dependence on both the gate-to-source and the drain-to-source voltages.
Organic transistor 300 can also be constructed as a top gate structure as shown in FIG. 3. A conductive film is deposited and patterned on an insulating substrate 312 to form conductive regions 318 and 316. One of these conductive regions is known as the source 318, and the other as the drain 316. The gap 324 between source 318 and drain 316 is the channel region of transistor 300. A thin organic semiconductor layer 326 is deposited on top of these conductive regions such that the entire gap 324 and at least a portion of conductive regions source 318 and drain 316 are covered. A dielectric layer 320 is deposited on top of semiconductor layer 326. A conductive layer 322 is deposited and patterned such that at the underlying gap 324 and at least a portion of the source 316 and the drain 316 are covered. The field effect causes the resistance of the organic semiconductor 326 inside the gap 324 in the vicinity of the interface between the semiconductor 326 and the dielectric 320 to decrease as a voltage is applied between the gate 322 and the source 318. When another voltage is applied between the source 318 and the drain 316, current flows between the source 318 and the drain 316. The value of the current depends on the voltage between gate 322 and the source 318.
In all of the structures shown in FIGS. 1–3, all layers may be patterned as long as the gate conductor overlaps the channel region gap and at least a portion of the source and drain, and organic semiconductor and dielectric are placed so that the gate conductor and the source/drain conductor are electrically isolated.
Organic semiconductor materials are often classified as polymeric, low molecular weight, or hybrid. Pentacene, hexithiphene, TPD, and PBD are examples of low weight molecules. Polythiophene, parathenylene vinylene, and polyphenylene ethylene are examples of polymeric semiconductors. Polyvinyl carbazole is an example of a hybrid matrial. These materials are not classified as insulators or conductors. Organic semiconductors behave in a manner that can be described in terms analogous to the band theory in inorganic semiconductors. However, the actual mechanics giving rise to charge carriers in organic semiconductors are substantially different from inorganic semiconductors. In inorganic semiconductors, such as silicon, carriers are generated by introducing atoms of different valences into a host crystal lattice, the quantity of which is described by the number of carriers that are injected into the conduction band, and the motion of which can be described by a wave vector k. In organic semiconductors, carriers are generated in certain materials by the hybridization of carbon molecules in which weakly bonded electrons, called π electrons, become delocalized and travel relatively far distances from the atom which originally gave rise to that electron. This effect is particularly noted in materials comprising of conjugated molecules or benzene ring structures. Because of the delocalization, these π electrons can be loosely described as being in a conduction band. This mechanism gives rise to a low charge mobility, a measure describing the speed with which these carriers can move through the semiconductor, resulting in dramatically lower current characteristics of organic semiconductors in comparison to inorganic semiconductors.
Though organic transistors have much lower performance than inorganic transistors, the materials and processing techniques to produce organic transistors cost significantly less than those used to produce inorganic transistors. Therefore, organic transistor technology has application where low cost is desired and low performance is acceptable. As the effective performance of an organic transistor is increased, the number of applications for organic transistor technology also increases. An example of this type of application is Radio Frequency Identification (RFID) tags. Though RFID tags can be produced that operate at any frequency, it is desirable to produce RFID tag using frequency ranges that are used in typical applications. One such typical frequency for RFID tags is 13.56 Mhz, a frequency that is well above the unity gain frequency of organic transistors, and in the range where non-quasi-static behavior needs to be taken into account.
The performance of an organic transistor is proportional to the charge mobility divided by the channel length squared. Therefore, the channel length, the gap between the source and drain, is a very strong function of the performance of an organic transistor. With a manufacturable technology capable of more finely defining this channel length, the performance of the organic transistor is greatly enhanced.
Conventional techniques for defining features during organic field effect transistor (OFET) fabrication have typically involved the use of photolithography and vacuum deposition. However, such methods do not result in the low price points that are desired. Though photolithography can define fine channel length dimensions, these techniques are not practically applied to the construction of low-cost organic technology due to cost of the many steps involved-photo resist spin, photo resist expose, photo resist develop, etch, photo resist removal, and clean. Some more efficient techniques for printing fine resolutions have been explored, such as microcontact printing (μ-CP). With this technique, smaller feature sizes have been demonstrated. However, μ-CP has not been shown to be compatible with large-scale production due to fragile print stamps, alignment issues, and poor throughput. Another approach has involved pre-patterning the substrate before printing where a photomask may be used to define a hydrophobic region within a channel with surrounding hydrophilic regions. The modified wetting properties of the substrate generally afford a narrower feature size after printing than would otherwise be achievable without the use of such feature-enhancing techniques. While this method has been demonstrated in certain laboratory settings, it is uncertain whether this process can be made cost effective for mass production. Notwithstanding the preceding, a method of forming sufficiently narrow channels that is compatible with existing manufacturing processes is desirable for improved or otherwise suitable OFET performance.